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INTEGRATED CIRCUITS
DATA SHEET
TSA5520; TSA5521 1.3 GHz universal bus-controlled TV synthesizer
Product specification Supersedes data of 1995 Mar 16 File under Integrated Circuits, IC02 1996 Oct 10
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
FEATURES * Complete 1.3 GHz single chip system * Four PNP band switch buffers (40 mA) * 33 V output tuning voltage * In-lock detector * 15-bit programmable divider * Programmable reference divider ratio (512, 640 or 1024) * Programmable charge-pump current (60 or 280 A) * Varicap drive disable * Universal bus protocol I2C-bus or 3-wire bus (the TSA5520/TSA5521 I2C-bus mode only includes the write mode; if both read and write modes are required the TSA5526/TSA5527 devices should be selected): - bus protocol for 18 or 19 bits transmission (3-wire bus) - extra protocol for 27 bits for test and features (3-wire bus) - address plus 4 data bytes transmission (I2C-bus) - three independent I2C-bus addresses * Low power and low radiation. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TSA5520M TSA5520T TSA5521M TSA5521T SSOP16 SO16 SSOP16 SO16 DESCRIPTION APPLICATIONS
TSA5520; TSA5521
* TV tuners and front ends * VCR tuners.
VERSION SOT369-1 SOT109-1 SOT369-1 SOT109-1
plastic shrink small outline package; 16 leads; body width 4.4 mm plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 4.4 mm plastic small outline package; 16 leads; body width 3.9 mm
1996 Oct 10
2
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
QUICK REFERENCE DATA SYMBOL VCC1 VCC2 ICC1 ICC2 fRF Vi(RF) PARAMETER supply voltage (+5 V) band switch supply voltage (12 V) supply current band switch supply current RF input frequency RF input voltage 80 to 150 MHz 150 MHz to 1 GHz 1 to 1.3 GHz fxtal Io(PNP) Ptot Tstg Tamb Notes 1. One band switch buffer ON with 40 mA. 2. One buffer ON, Io = 40 mA; two buffers ON, maximum sum of Io = 50 mA. 3. The power dissipation is calculated as follows: P D = V CC1 x I CC1 + V CC2 x ( I CC2 - I o ) + I o x V CE ( satPNP ) + ( V33 2 ) 27 k
2
TSA5520; TSA5521
CONDITIONS
MIN. 4.5 VCC1 -
TYP. - 12 20 50 - - - - 4.0 - 250 - -
MAX. 5.5 13.5 25 55 1300 +3 +3 +3 4.48 50 400 +150 +85
UNIT V V mA mA MHz dBm dBm dBm MHz mA mW C C
note 1
- 64 -25 -28 -15 3.2 4 - -40 -20
crystal oscillator input frequency PNP band switch buffers output current note 2 total power dissipation IC storage temperature operating ambient temperature note 3
1996 Oct 10
3
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
GENERAL DESCRIPTION The device is a single-chip PLL frequency synthesizer designed for TV and VCR tuning systems. The circuit consists of a divide-by-eight prescaler with its own preamplifier, a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase/frequency detector combined with a charge-pump which drives the tuning amplifier and the 33 V output. Four high-current PNP band switch buffers are provided for band switching. Two PNP buffers can be switched on simultaneously. The sum of the collector currents is limited to 50 mA. Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 3.90625 kHz, 6.25 kHz or 7.8125 kHz using a 4 MHz crystal. The lock detector output is LOW when the PLL loop is locked. In the test mode, this output is used as a test output for fref and 1/2fdiv (see Table 6). The device can be controlled in accordance with the I2C-bus format or the 3-wire bus format depending on the voltage applied to the SW input (see Table 2). I2C-bus format (SW = LOW) Five serial bytes (including address byte) are required to address the device, select the VCO frequency, program the four PNP band switch buffers, set the charge-pump current and the reference divider ratio. Table 1 Differences between TSA5520 and TSA5521 DATA WORD 18-bit 19-bit 18-bit or 19-bit
TSA5520; TSA5521
The device has three independent I2C-bus addresses which can be selected by applying a specific voltage on the CE input (see Table 5). The general address C2 is always valid. When the I2C-bus format is fully used, TSA5520 and TSA5521 are equal. 3-wire bus format (SW = VCC1 or open-circuit) Data is transmitted to the device during a HIGH level on the CE input (enable line pin 15). The device is compatible with 18-bit and 19-bit data formats. The first four bits are used to program the PNP band switch buffers and the remaining bits are used to control the programmable divider. A 27-bit data format may also be used to set the charge-pump current, the reference divider ratio and for test purposes. The difference between TSA5520 and TSA5521 are given in Table 1. When the 27-bit format is used, the TSA5520 and TSA5521 are equal and the reference divider is controlled by the RSA and RSB bits (see Table 7). More details are given in Chapter "Functional description" Section "3-wire bus mode (SW = open-circuit or VCC1); see Figs 3, 4 and 5".
TYPE NUMBER TSA5520 TSA5520 TSA5521 Notes
REFERENCE DIVIDER 512(1) 1024(1) 640(2)
FREQUENCY STEP (kHz) 62.5 31.25 50
1. The selection of the reference divider is given by an automatic identification of the data word length. 2. The reference divider is set to 640 at power-on reset.
1996 Oct 10
4
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
BLOCK DIAGRAM
TSA5520; TSA5521
handbook, full pagewidth
RF
1
AMP
PRESCALER DIVIDE-BY-8
15-BIT PROGRAMMABLE DIVIDER f div DIGITAL PHASE COMPARATOR CHARGE PUMP CP
AMP
9 10
CP V tune
16 XTAL
XTAL OSCILLATOR
DIVIDER 512/640/1024
f ref
RSA RSB POWER-ON RESET 15-BIT FREQUENCY REGISTER
T2,T1,T0
13 SCL 14 SDA 15 CE I 2 C/3-WIRE BUS RECEIVER
IN-LOCK DETECTOR LOCK RSA,RSB
LOGIC
3 OS 11 4-BIT BAND SWITCH REGISTER GATE 7-BIT CONTROL REGISTER 2
VCC1 VEE
SW
T2,T1,T0
12
TSA5520 TSA5521
4 VCC2 8 BS1 7 BS2 6 BS3 5 BS4
MKA965
LOCK
Fig.1 Block diagram.
1996 Oct 10
5
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
PINNING SYMBOL RF VEE VCC1 VCC2 BS4 BS3 BS2 BS1 CP Vtune SW LOCK SCL SDA CE XTAL PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ground supply voltage (+5 V) band switch supply voltage (+12 V) PNP band switch buffer output 4 PNP band switch buffer output 3 PNP band switch buffer output 2 PNP band switch buffer output 1 charge-pump output tuning voltage output bus format selection input, I2C-bus or 3-wire lock detector output serial clock input serial data input/output chip enable/address selection input crystal oscillator input DESCRIPTION RF signal input
TSA5520; TSA5521
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION The device is controlled via the I2C-bus or the 3-wire bus depending on the voltage applied to the SW input (pin 11). A HIGH level on the SW input enables the 3-wire bus inputs which are Chip Enable (CE), serial data input (SDA) and serial clock input (SCL). A LOW level on the SW input enables the I2C-bus inputs which are CE [Address Selection (AS) input], serial data input/output (SDA) and serial clock input (SCL). The bus format selection is given in Table 2. I2C-bus mode (SW = LOW); see Table 3 Data bytes can be sent to the device after the address transmission (first byte). Four data bytes are required to fully program the device. The bus receiver has an auto-increment facility which permits the programming of the device within one single transmission (address + 4 data bytes). The device can also be partially programmed providing that the first data byte following the address is Divider Byte 1 (DB1) or the Control Byte (CB). The bits in the data bytes are defined in Table 3.
The first bit of the first data byte transmitted indicates whether frequency data (first bit = 0) or control and band switch data (first bit = 1) will follow. Until an I2C-bus STOP command is sent by the controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded after the 8th clock pulse of the second Divider Byte (DB2), the control register is loaded after the 8th clock pulse of the Control Byte (CB) and the band switch register is loaded after the 8th clock pulse of the Band switch Byte (BB). I2C-bus address selection The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 3) in one system by applying a specific voltage to the CE input. The relationship between MA1 and MA0 and the input voltage applied to the CE input is given in Table 5.
1996 Oct 10
6
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
Table 2 Bus format selection PIN 11 13 14 15 Table 3 I2C-bus data format BYTE Address Byte (ADB) Divider Byte 1 (DB1) Divider Byte 2 (DB2) Control Byte (CB) Band switch Byte (BB) Table 4 MSB 1 0 N7 1 X 1 N14 N6 CP X 0 N13 N5 T2 X DATA BYTE 0 N12 N4 T1 X 0 N11 N3 T0 BS4 MA1 N10 N2 RSA BS3 MA0 N9 N1 RSB BS2 NAME SW SCL SDA CE 3-WIRE BUS MODE open or HIGH clock input data input chip enable input
TSA5520; TSA5521
I2C BUS MODE LOW SCL input SDA input/output address selection input
LSB 0 N8 N0 OS BS1
SLAVE ANSWER A A A A A
Description of Table 3 DESCRIPTION acknowledge programmable address bits (see Table 5) programmable divider bits; N = N14 x 214 + N13 x 213 + ... + N1 x 2 + N0 charge-pump current; CP = 0 = 60 A; CP = 1 = 280 A test bits (see Table 6); for normal operation T2 = 0, T1 = 0 and T0 = 1 reference divider ratio select bits (see Table 7) tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON; when OS = 1 tuning voltage is OFF (high impedance) PNP band switch buffers control bits; when BSn = 0 buffer n is OFF; when BSn = 1 buffer n is ON don't care I2C-bus address selection MA1 0 0 1 1 MA0 0 1 0 1
SYMBOL A MA1 and MA0 N14 to N0 CP T2 to T0 RSA and RSB OS BS4 to BS1 X Table 5
VOLTAGE APPLIED TO THE CE INPUT (SW = LOW) 0 to 0.1VCC1 Always valid 0.4VCC1 to 0.6VCC1 0.9VCC1 to VCC1
1996 Oct 10
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Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
3-wire bus mode (SW = open-circuit or VCC1); see Figs 3, 4 and 5 During a HIGH level on the CE input, the data is clocked into the data register at the HIGH-to-LOW transition of the clock pulse. The first four bits control the band switch buffers and are loaded into the internal band switch register on the 5th rising edge of the clock pulse. The frequency bits are loaded into the frequency register at the HIGH-to-LOW transition of the chip enable line when an 18-bit or 19-bit data word is transmitted. At power-on the charge-pump current is set to 280 A, the tuning voltage output is disabled (Vtune = 33 V in application; see Fig.12), the test bits T2, T1 and T0 are set to the normal mode and RSB is set to 1 (TSA5520) or 0 (TSA5521). When an 18-bit data word is transmitted, the most significant bit of the divider N14 is internally set to 0 and bit RSA is set to 1. When a 19-bit data word is transmitted, bit RSA is set to 0. When a 27-bit word is transmitted, the frequency bits are loaded into the frequency register on the 20th rising edge of the clock pulse and the control bits at the HIGH-to-LOW transition of the chip enable line. In this mode, the reference divider is given by the RSA and RSB bits (see Table 7). The test bits T2, T1 and T0, the charge-pump bit CP, the ratio select bit RSB and the OS bit can only be selected or changed with a 27-bit transmission. They remain programmed if an 18-bit or a 19-bit transmission
TSA5520; TSA5521
occurs. Only RSA is controlled by the transmission length when the 18-bit or 19-bit format is used. A data word of less than 18 bits will not affect the frequency register of the device. The definition of the bits is unchanged compared to the I2C bus mode. The power-on detection threshold voltage VPOR is fixed to VCC1 = 2 V at room temperature. Below this threshold, the device is reset to the power-on state described above. Table 6 T2 0 0 1 1 1 1 T1 0 1 1 1 0 0 Test bits T0 1 X 0 1 0 1 DEVICE OPERATION normal mode charge-pump is OFF charge-pump is sinking current charge-pump is sourcing current fref is available at LOCK output
1 f 2 div
is available at LOCK output
Table 7
Ratio select bits RSB 0 1 1 REFERENCE DIVIDER 640 1024 512
RSA X 0 1
For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024. For TSA5521 bit RSB = 0 at power-on; the reference divider is 640. For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains as programmed with the 27-bit data word.
Fig.3 Normal mode; 18-bit data format (RSA = 1).
1996 Oct 10
8
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
TSA5520; TSA5521
For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024. For TSA5521 bit RSB = 0 at power-on; the reference divider is 640. For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains as programmed with the 27-bit data word.
Fig.4 Normal mode; 19-bit data format (RSA = 0).
For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024. For TSA5521 bit RSB = 0 at power-on; the reference divider is 640. For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains as programmed with the 27-bit data word.
Fig.5 Test and features mode; 27-bit data format.
1996 Oct 10
9
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC1 VCC2 Vi(RF) Vo(BSn) Io(BSn) Vo(CP) Vo(tune) Vi(SW) Vo(LOCK) Vi(SCL) Vi/o(SDA) Io(SDA) Vi(CE) Vi(xtal) Tstg Tj tsc Note PARAMETER supply voltage; +5 V (pin 3) band switch supply voltage; +12 V (pin 4) prescaler input voltage band switch buffers output voltage (pins 5 to 8) band switch buffers output current charge-pump output voltage (pin 9) output tuning voltage (pin 10) input switching voltage (pin 11) lock output voltage (pin 12) serial clock input voltage (pin 13) serial data input/output voltage (pin 14) serial data output current chip enable input voltage (pin 15) crystal oscillator input voltage (pin 16) IC storage temperature maximum junction temperature short-circuit time; every pin except pin 4 to pin 3 and every pin to pin 2 note 1 CONDITIONS
TSA5520; TSA5521
MIN. -0.3 -0.3 -0.3 -0.3 -1 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -1 -0.3 -0.3 -40 - -
MAX. +6.0 +16 VCC1 VCC2 +50 VCC1 +35 VCC1 VCC1 +6.0 +6.0 +10 +6.0 VCC1 +150 +150 10 V V V V
UNIT
mA V V V V V V mA V V C C s
1. Short-circuit between VCC1 and VCC2 is allowed provided the voltage applied to VCC2 is less than the 6 V maximum rating at VCC1. HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling bipolar devices. Every pin withstands the ESD test in accordance with "MIL-STD-883C category B" (2000 V). Every pin withstands the ESD test in accordance with Philips Semiconductors Machine Model 0 , 200 pF (200 V). THERMAL CHARACTERISTICS SYMBOL Rth j-a SO16 SSOP16 PARAMETER thermal resistance from junction to ambient in free air 110 142 K/W K/W VALUE UNIT
1996 Oct 10
10
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
TSA5520; TSA5521
CHARACTERISTICS VCC1 = 4.5 to 5.5 V; VCC2 = VCC1 to 13.2 V; Tamb = -20 to +85 C; unless otherwise specified. SYMBOL Supplies VCC1 VCC2 ICC1 ICC2 supply voltage band switch buffers supply voltage supply current at power-on one band switch buffer is ON; Isource = 40 mA band switch buffers supply current at power-on 4.5 VCC1 - - - - 12 20 0.5 50 56 5.5 13.5 25 1 55 62 V V mA mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
two band switch buffers are ON; - Isource = 40 mA + 5 mA (any combination) VPOR fRF DR fxtal Zxtal supply voltage below which POR is active RF input frequency divider ratio crystal oscillator input frequency crystal oscillator input impedance (absolute value) 15-bit frequency word 14-bit frequency word Rxtal = 25 to 200 fi = 4 MHz 1.5 64 256 256 3.2 600
2.0 - - - 4.0 1200
- 1300 32767 16383 4.48 -
V MHz
MHz
Prescaler (see Figs 8 and 9) Vi(RF) RF input level fi = 80 to 150 MHz fi = 150 to 1000 MHz fi = 1000 to 1300 MHz Zi(RF) ILO Vo(sat) input impedance see Fig.8 -10 - - 0.2 - 0.4 A V PNP band switch buffers outputs (pins 5 to 8) output leakage current output saturation voltage VCC2 = 13.5 V; Vo = 0 V Isource = 40 mA; Vo(sat) = VCC2 - Vo VCC1 = 5.5 V; Vo = 5.5 V Isource = 200 A; Vo(sat) = VCC1 - Vo -25 -28 -15 - - - 3 3 3 dBm dBm dBm
LOCK output (PNP collector output) Io(ool) Vosat(ool) Vo(LOCK) VIL VIH IIH IIL output current when out-of-lock output saturation voltage when out-of-lock LOCK output voltage - - - - 0.4 0.01 - - - - 100 0.8 0.4 A V V
SW input (bus format input) LOW level input voltage HIGH level input voltage HIGH level input current LOW level input current VSW = VCC1 VSW = 0 V 0 3 - -100 1.5 VCC1 10 - V V A A
1996 Oct 10
11
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
SYMBOL PARAMETER CONDITIONS
TSA5520; TSA5521
MIN.
TYP. - - - - - - - - - - 100 - -
MAX.
UNIT
CE input (chip enable/address selection) VIL VIH IIH IIL VIL VIH IIH IIL fclk LOW level input voltage HIGH level input voltage HIGH level input current LOW level input current VCE = 5.5 V VCE = 0 V 0 3 - -10 1.5 5.5 10 - V V A A
SCL and SDA inputs LOW level input voltage HIGH level input voltage HIGH level input current LOW level input current clock frequency VBUS = 5.5 V; VCC1 = 0 V VBUS = 5.5 V; VCC1 = 5.5 V VBUS = 1.5 V; VCC1 = 0 V VBUS = 0 V; VCC1 = 5.5 V SDA outputs (I2C-bus mode) ILO Vo |IICPH| |IICPL| VCP ILI(off) output leakage current output voltage VSDA = 5.5 V Isink = 3 mA CP = 1 CP = 0 in-lock; Tamb = 25 C T2 = 0; T1 = 1 - - - - - -15 - 0.2 10 0.4 - - - +15 A V A A V nA A V 0 3.0 - - - -10 - 1.5 5.5 10 10 10 - 400 V V A A A A kHz
Charge-pump output CP HIGH charge-pump current LOW charge-pump current output voltage off-state leakage current 280 60 1.95 -0.5 - -
Tuning voltage output Vtune ILO(off) Vo leakage current when switched-off output voltage when the loop is closed OS = 1; Vtune = 33 V OS = 0; T2 = 0; T1 = 0; T0 = 1; RL = 27 k; Vtune = 33 V 10 32.7
3-wire bus timing (see Figs 6 and 7) tHIGH tSU;DAT tHD;DAT tSU;ENSCL tHD;ENDAT tEN tHD;ENSCL clock high time data set-up time data hold time enable to clock set-up time enable to data hold time enable between two transmissions enable to clock active edge hold time 2 2 2 10 2 10 6 - - - - - - - - - - - - - - s s s s s s s
1996 Oct 10
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Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
TSA5520; TSA5521
Fig.6 Timing diagram for 3-wire bus; SDA, SCL and CE.
Fig.7 Timing diagram for 3-wire bus; CE and SCL.
1996 Oct 10
13
BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBB
Fig.8 Prescaler Smith chart of typical input impedance at pin 1. Fig.9 Prescaler typical input sensitivity curve.
1996 Oct 10 Philips Semiconductors
1.3 GHz universal bus-controlled TV synthesizer
14
TSA5520; TSA5521
Product specification
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
INTERNAL PIN CONFIGURATION
handbook, full pagewidth
VCC1
TSA5520; TSA5521
internal Vref reference voltage
VCC1
RF
1 16 XTAL
VEE V EE VCC1 VCC2 2
VEE VCC1
3
15 CE
4 to address selection VEE VCC1
VCC2
BS4
5
14 SDA
ACK VEE VCC2 (I2 C BUS)
VEE VCC1
13
6 BS3
TSA5520 TSA5521
VEE VCC1 command 12
SCL
LOCK VEE VCC2 VEE VCC1
BS2
7
11 SW VEE 10 VEE V tune
VCC2 VEE VCC1 down 9 CP
8 BS1
VEE
up
VEE
MLC886 - 1
Fig.10 Internal pin configuration.
1996 Oct 10
15
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
APPLICATION INFORMATION Tuning amplifier The tuning amplifier is capable of driving the varicap voltage without an external transistor. The tuning voltage output must be connected to an external load of 27 k which is connected to the tuning voltage supply rail. Figures 11 and 12 show a possible loop filter. The component values depend on the oscillator characteristics and the selected reference frequency. Examples of I2C-bus sequences (SW = LOW) Crystal oscillator
TSA5520; TSA5521
The crystal oscillator uses a 4 MHz crystal connected in series with an 18 pF capacitor thereby operating in the series resonance mode. Connecting the oscillator to the supply voltage is preferred but it can, however, also be connected to ground.
Tables 8 to 12 show the various sequences where fosc = 100 MHz, BS4 = ON, ICP = 280 A, N = 512, fxtal = 4 MHz, S = START, A = acknowledge and P = STOP. The sequence is as follows: START + address byte + divider byte 1 + divider byte 2 + control byte + band switch byte + STOP. For the complete sequence see Table 8 (sequence 1) or Table 9 (sequence 2). Table 8 S Table 9 S Complete sequence 1 C2 A 06 A 40 A CE A 08 A P
Complete sequence 2 C2 A CE A 08 A 06 A 40 A P
Table 10 Divider bytes only sequence S C2 A 06 A 40 A P
Table 11 Control and band switch bytes only sequence S C2 A CE A 08 A P
Table 12 Control byte only sequence S C2 A CE A P
Other I2C-bus sequences are not allowed. Other I2C-bus addresses may be selected by applying an appropriate voltage to the CE input. Examples of 3-wire bus sequences (TSA5520; SW = OPEN) Table 13 18-bit sequence (fosc = 800 MHz, BS4 = ON) 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0
Table 14 19-bit sequence (fosc = 650 MHz, BS3 = ON) 0 1 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0
The reference divider is automatically set to 512 unless RSB has been programmed to 0 during a 27-bit sequence.
1996 Oct 10
16
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
TSA5520; TSA5521
Table 15 27-bit sequence (fosc = 750 MHz, BS1 = ON, N = 640, Icp = 60 A, no test function) 0 0 0 1 0 1 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 0 0 1 0 0 0
The reference divider is automatically set to 1024 unless RSB has been programmed to 0 during a 27-bit sequence. This sequence sets RSA = RSB = 0; CP = 0. Table 16 19-bit sequence 0 0 0 1 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0
This sequence will program fosc to 600 MHz in 50 kHz steps. ICP remains at 60 A. Table 17 18-bit sequence 0 0 0 1 1 0 1 1 1 0 1 1 1 0 0 0 0 0
This sequence will program fosc to 600 MHz in 50 kHz steps. ICP remains at 60 A. Table 18 27-bit sequence (fosc = 650 MHz, BS1 = ON) 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 1 1 0 0 1 0 1 0
This sequence sets RSA to 0, RSB to 1 and CP to 1. After this sequence ICP = 280 A, N = 1024 (19-bit transmission) and N = 512 (18-bit transmission), RSB = 1. Example of 3-wire bus sequence (TSA5521; SW = OPEN) Table 19 19-bit sequence (fosc = 700 MHz, BS3 = ON) 0 1 0 0 0 1 1 0 1 1 0 1 0 1 1 0 0 0 0
N = 640 unless RSB has been programmed to 0 during a 27-bit sequence.
1996 Oct 10
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Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
22 k
handbook, full pagewidth
TSA5520; TSA5521
2.2 nF 100 nF CP 22 k V tune SW LOCK SCL SDA AS LOCK SCL SDA CE XTAL BS2 BS3 BS4 VCC2 VCC1 V EE RF BS1
27 k 33 V SWITCH HIGH MID LOW 12 V
10 nF (2)
33 nF
V tune
TSA552X
RF 1 nF 5V
MLC887
4 MHz
18 pF
(1)
(1) Connection to ground is also allowed. (2) Capacitor prevents parasitic oscillation on the VCC2 line.
Fig.11 Typical I2C-bus application.
handbook, full pagewidth
22 k 27 k 33 V 100 nF CP 22 k V tune SW LOCK CLOCK DATA ENABLE LOCK SCL SDA CE XTAL BS2 BS3 BS4 VCC2 VCC1 V EE RF 1 nF 5V
MLC888
33 nF
V tune
2.2 nF
BS1
SWITCH HIGH MID LOW 12 V
10 nF (2)
TSA552X
RF
4 MHz
18 pF
(1)
(1) Connection to ground is also allowed. (2) Capacitor prevents parasitic oscillation on the VCC2 line.
Fig.12 Typical 3-wire bus application.
1996 Oct 10
18
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
PACKAGE OUTLINES SO16: plastic small outline package; 16 leads; body width 3.9 mm
TSA5520; TSA5521
SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 A1 pin 1 index Lp 1 e bp 8 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 0.24 0.23 L 1.05 0.041 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.0098 0.057 0.069 0.0039 0.049
0.019 0.0098 0.39 0.014 0.0075 0.38
0.028 0.004 0.012
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07S JEDEC MS-012AC EIAJ EUROPEAN PROJECTION
ISSUE DATE 91-08-13 95-01-23
1996 Oct 10
19
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
TSA5520; TSA5521
SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm
SOT369-1
D
E
A X
c y HE vM A
Z
16
9
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0.00 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.25 0.13 D (1) 5.30 5.10 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT369-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 94-04-20 95-02-04
1996 Oct 10
20
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
SOLDERING SO or SSOP Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these cases reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO and SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering SO Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. SSOP
TSA5520; TSA5521
Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). METHOD (SO OR SSOP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds at 270 to 320 C.
1996 Oct 10
21
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TSA5520; TSA5521
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1996 Oct 10
22
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled TV synthesizer
NOTES
TSA5520; TSA5521
1996 Oct 10
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 247 9145, Fax. +7 095 247 9144 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/50/02/pp24
Date of release: 1996 Oct 10
Document order number:
9397 750 01353

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